Q.1 In Reverse Polish notation, expression A*B+C*D is
written as
(A) AB*CD*+ (B)
A*BCD*+
(C) AB*CD+* (D)
A*B*CD+
Ans: A
Q.2 SIMD represents an organization that ______________.
(A) refers to a computer system capable of processing
several programs at the same time.
(B) represents organization of single computer containing a
control unit, processor unit and a
memory unit.
(C) Includes many processing units under the supervision of
a common control unit
(D) none of the above.
Ans: C
Q.3 Floating point representation is used to store
(A) Boolean values
(B) whole numbers
(C) real integers (D)
integers
Ans: C
Q.4 Suppose that a bus has 16 data lines and requires 4
cycles of 250 nsecs each to transfer data.The bandwidth of this bus would be 2
Megabytes/sec. If the cycle time of the bus was reduced to 125 nsecs and the
number of cycles required for transfer stayed the same what would the bandwidth
of the bus?
(A) 1 Megabyte/sec
(B) 4 Megabytes/sec
(C) 8 Megabytes/sec
(D) 2 Megabytes/sec
Ans: D
Q.5 ,
(A) uses alphabetic codes in place of binary numbers used in
machine language
(B) is the easiest language to write programs
(C) need not be translated into machine language
(D) None of these
Ans: A
Q.6 In computers, subtraction is generally carried out by
(A) 9’s complement
(B) 10’s complement
(C) 1’s complement
(D) 2’s complement
Ans: D
Q.7 The amount of time required to read a block of data from
a disk into memory is composed of seek time, rotational latency, and transfer
time. Rotational latency refers to
(A) the time its takes for the platter to make a full
rotation
(B) the time it takes for the read-write head to move into
position over the appropriate track
(C) the time it takes for the platter to rotate the correct
sector under the head
(D) none of the above
Ans: A
Q.8 What characteristic of RAM memory makes it not suitable
for permanent storage?
(A) too slow
(B) unreliable
(C) it is volatile
(D) too bulky
Ans: C
Q.9 ,_____________________.
(A) giving programming versatility to the user by providing
facilities as pointers to memory counters for loop control
(B) to reduce no. of bits in the field of instruction
(C) specifying rules for modifying or interpreting address
field of the instruction
(D) All the above
Ans: D
Q.10 The circuit used to store one bit of data is known as
(A) Register (B)
Encoder
(C) Decoder (D)
Flip Flop
Ans: D
Q. 11 (2FAOC)16 is equivalent to
(A) (195 084)10
(B) (001011111010 0000 1100)2
(C) Both (A) and (B)
(D) None of these
Ans: B
Q.12 The average time required to reach a storage location
in memory and obtain its contents is called the
(A) seek time
(B) turnaround time
(C) access time (D)
transfer time
Ans: C
Q.13 Which of the following is not a weighted code?
(A) Decimal Number system (B) Excess 3-cod
(C) Binary number System (D) None of these
Ans: B
Q.14 The idea of cache memory is based
(A) on the property of locality of reference
(B) on the heuristic 90-10 rule
(C) on the fact that references generally tend to cluster
(D) all of the above
Ans: A
Q.15 _________ register keeps track of the instructions
stored in program stored in memory.
(A) AR (Address Register) (B) XR (Index Register)
(C) PC (Program Counter) (D) AC (Accumulator)
Ans: C
Q.16 The addressing
mode used in an instruction of the form ADD X Y, is
(A) Absolute (B)
indirect
(C) index
(D) none of these
Ans: C
Q.17 If memory access takes 20 ns with cache and 110 ns with
out it, then the ratio (cache uses a 10 ns memory) is
(A) 93% (B) 90%
(C) 88% (D) 87%
Ans: B
Q.18 In a memory-mapped I/O system, which of the following
will not be there?
(A) LDA (B) IN
(C) ADD (D) OUT
Ans: A
Q.19 In a vectored interrupt.
(A) the branch address is assigned to a fixed location in
memory.
(B) the interrupting source supplies the branch information
to the processor through an interrupt vector.
(C) the branch address is obtained from a register in the
processor
(D) none of the above
Ans: B
Q.20 Von Neumann architecture is
(A) SISD (B)
SIMD
(C) MIMD (D) MISD
Ans: A
Q. 21 The circuit used to store one bit of data is known as
(A) Encoder (B) OR
gate
(C) Flip Flop (D)
Decoder
Ans: C
Q.22 Cache memory acts between
(A) CPU and RAM
(B) RAM and ROM
(C) CPU and Hard Disk
(D) None of these
Ans: A
Q.23 Write Through technique is used in which memory for
updating the data
(A) Virtual memory
(B) Main memory
(C) Auxiliary memory
(D) Cache memory
Ans: D
Q.24 Generally Dynamic RAM is used as main memory in a
computer system as it
(A) Consumes less power
(B) has higher speed
(C) has lower cell density
(D) needs refreshing circuitary
Ans: B
Q.25 In signed-magnitude binary division, if the dividend is
(11100)2 and divisor is (10011)2 then the result is
(A) (00100)2 (B)
(10100)2
(C) (11001)2 (D)
(01100)2
Ans: B
